The present invention relates to circuits and techniques for scrambling code acquisition and verification in code-division-multiple-access wireless systems.
FIG. 1 illustrates an example of a wireless communications system which may benefit by the inclusion of embodiments of the present invention. Included are a base station 110, antenna 120, transmit signal 130, and terminal or handset 140. Signals transmitted by the base station 110 using antenna 120 are received by the terminal 140. Base station 110 may communicate with more than one terminal or handset 140 using antenna 120. Base station 110 may use more than one antenna 120. Terminal or handset 140 may receive signals from more than one base station 110 and antenna 120.
In particular, the base station 110 may use antenna 120 to transmit a code division multiple access (CDMA) or wideband CDMA (WCDMA) signal 130. In that case, each base station 110 uses a unique scrambling code to separate its transmitted signal from those of other base stations 110. The scrambling codes are organized into 64 code groups of eight codes each. Terminal or handset 140 determines the scrambling code group and code being used by the base station 110.
In wideband CDMA or 3G systems, the base station 110 uses antenna 120 to transmit a signal 130 that includes two types of information. The first includes synchronizing and code information, while the second includes data payloads.
FIG. 2 is a representation of synchronizing and code information that forms part of a transmitted signal in WCDMA. Included are a number of primary sync signals 210, secondary sync signals 220, and a common pilot channel signal 230 occurring in a frame 240. Further explanation of these signals and the signals in FIG. 11 may be found in 3rd Generation Partnership Project; Technical Specification Group Radio Access Network; Spreading and modulation (FDD) (Release 1999), 3GPP TS 25.213 V3.5.0 (2001-03), which is incorporated by reference.
Each frame 240 is 10 milliseconds in duration. There are 15 slots per frame, and each slot includes one primary sync 210 of 256 chips, one secondary sync 220, also of 256 chips, and one CPICH 230 of 2560 chips. The chip rate is 3.84 Mchips per second.
The primary sync signal is made up of identical 256 chips sequences, and is used to convey time slot boundary information. Each secondary sync signal is simultaneous with the primary sync signal and is made up of one of 16 different 256 chips sequences, which are varied in one of 64 different patterns that repeat each frame. Each of these 64 patterns correspond to one of the 64 code groups used. The CPICH signal 230 is an all ones signal that is scrambled by one of the 8 codes in the code group. This is the same code that base station 110 uses to scramble data payloads. The terminal or handset 140 receives this information, and from it determines the time slot boundary timing, code group, and code used by the base station 110.
Thus, what is need are reliable methods and circuits for determining or acquiring the code used by the base station 110, and verifying that the acquired code is the code being used by the base station 110.